* (C) Copyright Efficient Power Conversion Corporation. All rights reserved.
*****************************************************************************
* Version History:
* 1.00: 04/20/2015 - Initial Model Creation
* 1.01: 09/29/2015 - Updated the Model Parameters
* 1.02: 04/08/2016 - Updated the Model from the Preliminary Version
* 1.03: 02/19/2019 - Updated the Capacitance Model
* 1.04: 02/26/2019 - Added a missing parameter
* 1.05: 06/13/2022 - Updated x0_1
* 1.06: 06/14/2022 - Adapted for Simplis, Updated Voltage Dependent Capacitances

.subckt EPC2015C gatein drainin sourcein
*#ASSOC Category=NMOS Symbol=nmos_sub mapping=2,1,3

.param aWg=1566 A1=59.2261 k2=2.2992 k3=0.15 rpara=0.0022051 rpara_s_factor=0.35
 + aITc=0.003381 arTc=-0.0069 k2Tc=0.00087 x0_0=1.5604 x0_1=1.0e-6 x0_0_TC=0 x0_1_TC=0
 + dgs1=4.3e-07 dgs2=2.6e-13 dgs3=0.8 dgs4=0.23
 + ags1=9.6082e-10 ags2=6.3975e-10 ags3=1.7888 ags4=0.22483
 + ags5=-3.2617e-14 ags6=-8.5065 ags7=1.0672
 + agd1=6.2778e-15 agd2=5.7639e-11 agd3=-0.095939 agd4=20.99
 + agd5=1.3737e-10 agd6=-4.6799 agd7=2.0184
 + agd8=2.388e-12 agd9=-68.436 agd10=31.367
 + asd1=2.6484e-10 asd2=4.2816e-10 asd3=-19.424 asd4=4.6356
 + asd5=5.9878e-10 asd6=-0.53625 asd7=39.206 rg_value=0.3

.model rpar res(TC1={-1.0*arTc} T_measured=25)
rd drainin  drain  rpar {(1-rpara_s_factor)*rpara}
rs sourcein source rpar {rpara_s_factor*rpara}
rg gatein gate {(rg_value)}

*Large resistors to aid convergence
Rcsdconv drain source {100000Meg/aWg}
Rcgsconv gate source {100000Meg/aWg}
Rcgdconv gate drain {100000Meg/aWg}

gswitch drain source Value {if(v(drain,source)>0,
+	(A1*(1-aITc*(Temp-25))*log(1.0+exp((v(gate,source)-(k2*(1-k2Tc*(Temp-25))))/k3))*
+	v(drain,source)/(1 + (x0_0*(1-x0_0_TC*(Temp-25))+x0_1*(1-x0_1_TC*(Temp-25))*v(gate,source))*v(drain,source)) ),
+	(-A1*(1-aITc*(Temp-25))*log(1.0+exp((v(gate,drain)-(k2*(1-k2Tc*(Temp-25))))/k3))*
+	v(source,drain)/(1 + (x0_0*(1-x0_0_TC*(Temp-25))+x0_1*(1-x0_1_TC*(Temp-25))*v(gate,drain))*v(source,drain)) ) )}

ggsdiode gate source VALUE {if( v(gate,source) < 10,
+	0.125*aWg/1077*(dgs1*(exp((v(gate,source))/dgs3)-1)+dgs2*(exp((v(gate,source))/dgs4)-1)),
+	0.125*aWg/1077*(dgs1*(exp((10)/dgs3)-1)+dgs2*(exp((10)/dgs4)-1)) ) }

ggddiode gate drain Value {if( v(gate,drain) < 10,
+	0.125*aWg/1077*(dgs1*(exp((v(gate,drain))/dgs3)-1)+dgs2*(exp((v(gate,drain))/dgs4)-1)),
+	0.125*aWg/1077*(dgs1*(exp((10)/dgs3)-1)+dgs2*(exp((10)/dgs4)-1)) ) }

*Gate-source capacitance
C_GS        gate source  {ags1}  TC=0,0
gC_CGS1     gate source Q={(0.5*ags2*ags4*log(1+exp((v(gate,source)-ags3)/ags4))+
+           ags5*ags7*log(1+exp((v(source,drain)-ags6)/ags7)) )}

*Gate-drain capacitance
C_GD        gate drain  {agd1}  TC=0,0
gC_CGD1     gate drain Q={(0.5*ags2*ags4*log(1+exp((v(gate,drain)-ags3)/ags4))+
+           agd2*agd4*log(1+exp((v(gate,drain)-agd3)/agd4))+
+           agd5*agd7*log(1+exp((v(gate,drain)-agd6)/agd7))+
+           agd8*agd10*log(1+exp((v(gate,drain)-agd9)/agd10)))}

*Source-drain capacitance
C_SD        source drain  {asd1}  TC=0,0
gC_CSD1     source drain Q={(asd2*asd4*log(1+exp((v(source,drain)-asd3)/asd4))+
+           asd5*asd7*log(1+exp((v(source,drain)-asd6)/asd7)) )}

.ends